As is known in the art, fabrication of semiconductor devices utilizing a combination of electron beam (i.e., e-beam) and optical lithography systems requires alignment features that are optimized for both systems and are placed on the substrate with minimum placement errors between the two sets of features. More particularly, optical lithography uses alignment marks etched into a semiconductor substrate while electron beam lithography requires metal alignment marks. Further, there is less backscatter of electrons from the semiconductor than from metal. Further, while electron beam lithography is slower than optical lithography, electron beam lithography is able to produce smaller features than optical lithography. Another requirement for these features is that they be capable of standing up to subsequent wafer processes. The best method for insuring minimum placement errors is to pattern both sets of alignment features in one operation.
Typically the alignment process includes using an optical alignment tool to etch an alignment mark into the surface of the substrate or a zero layer (where Zero layer is the layer patterned on the substrate to serve as the pattern to which every subsequent layer is aligned) during the first patterning step. More particularly, in the formation of FETs in monolithic microwave integrated circuit (MMIC) mesas in a semiconductor substrate, one technique used for forming lithographic mask alignment marks is to use a zero layer process where the alignment mark would be formed in the surface of the substrate (i.e., the zero layer) prior to forming the MMIC mesa and another technique would be to combine the zero layer alignment marks with mesa layer to form the alignment marks simultaneously with the formation of the MMIC mesas while still another technique is the use of a zero layer to etch alignment marks into the substrate prior to the ohmic metal layer in a mesa-less process.
During subsequent processing, as for example forming gates in FETs, electron beam tools capable of creating smaller linewidth features, such as Schottky gate contacts, than optical tools are required. These electron beam tools use electromagnetic alignment techniques and hence require metal alignment marks.
More particularly, after the optical lithography processing metal alignment features are created on the previously processed wafer to provide adequate contrast of secondary or backscattered electrons for the electron beam alignment tool.
Thus, prior methods of mixing and matching optical and e-beam lithography systems developed for compound semiconductors have been based on alignment marks for the electron lithography system which are generated with the ohmic metal layer. This layer is itself aligned to an earlier layer having registration errors with respect to the initial optical alignment features imparted by the optical lithography step. Typically gold is a preferred metal layer for the electron beam alignment features because it's high atomic weight.
The inventors have recognized that for some semiconductor devices, early use of metal layers can pose a contamination risk during subsequent high temperature operations. This is particularly true in fabricating GaN FETS. More particularly, while with GaAs device fabrication the ohmic metal provides an adequate alignment signal due to differences in the metals composition and alloy conditions; the inventors have recognized that the alloy conditions and composition of the ohmic metal for GaN is different than the ohmic metal on GaAs and that with GaN the alloyed ohmic metal edges are very rough thereby making its use as an alignment mark for subsequent electron beam alignment undesirable nature of the post alloyed ohmic metal.
A typical process used to form FETs in a semiconductor MMIC would be to form a mesa by patterning a photoresist layer using optical lithography followed by an etching of the mesa pattern and alignment mark patterns in the surface of the substrate. The first mesa etch then also defines alignment marks for optical stepper. Later masks used to form ohmic contacts and additional alignment marks are aligned to the etched mesas. Then, metal is deposited for alloying and forming the ohmic source and drain contacts for the FET. The ohmic contact metal is also used to provide alignment marks for subsequent electron beam lithography to be used in forming the gate contacts; however, they may not be adequate in providing accurate alignment to the mesas alignment mark. In other words, the gate alignment error would equal the sum of any electron beam alignment error to the ohmic contact alignment mark plus any errors in the ohmic contact alignment mark to the mesa alignment mark.
More particularly, ohmic metal has been used for optical alignment as well as electron beam alignment, but the issue remains that you now have multiple layers which are aligned to different features. In addition to that the ohmic metal patterning process must be optimized to define the ohmic contact. The alignment marks defined in an ohmic contact are often not the optimum thickness or surface roughness for alignment purposes. As noted above, the inventors have recognized that with a GaN process the ohmic alignment marks are so rough that they are not useful for e-beam alignment, and another metal layer has had to be added to define the e-beam alignment marks.
The inventors have discovered a level zero metal layer that can withstand high temperature processing, such as used in GaN ohmic metal formation at 850-950 C for 10-30 seconds, without changing its geometrical shape or physical properties of the metal This level zero metal layer also severs well as alignment mark for both optical lithography and E-beam lithography.
In accordance with one embodiment of the disclosure, a method is provided for providing an alignment mark on a semiconductor structure, comprising: using an optical lithography to form a metal alignment mark on a substrate of the structure; using the formed metal alignment mark to form a first feature of a semiconductor device being formed on the substrate, such formation comprising using optical lithography; and using the formed metal alignment mark to form a second, different feature for the semiconductor device being formed on the substrate, such formation comprising using electron beam lithography.
In one embodiment, the first feature is a metal feature having a material different from the alignment mark metal.
In one embodiment, the first feature is an ohmic contact.
In one embodiment, the second feature is a Schottky contact.
In one embodiment, the metal alignment mark is a refractory metal or a refractory metal compound.
In one embodiment, the refractory metal or refractory metal compound has an atomic weight greater than 60.
In one embodiment, the metal alignment mark is TaN.
In one embodiment, the semiconductor device is a GaN semiconductor device.
In one embodiment, a semiconductor structure is provided having a metal alignment mark on a zero layer of the structure.
In one embodiment, a semiconductor structure is provided having a semiconductor device formed therein, such device having an ohmic contact and a Schottky contact formed in upper layers of the structure, such structure having a metal alignment mark on a lower layer of the structure.
With such method, simultaneous patterning of optical alignment features and secondary or backscattered electron alignment features is achieved using a refractory metal nitride having both sufficient atomic weight and thickness to provide a strong backscattered or secondary alignment signal, and sufficient thickness to create a good optical alignment signal. Edge quality and is improved over gold features having larger grain size, and the refractory metal nitride is unaffected by subsequent high temperature operations.
The use a refractory metal or a refractory metal compound of sufficient atomic weight allows optimization of a dedicated alignment layer for optical alignment signal quality while simultaneously optimizing the layer for backscattered and secondary electron alignment signal quality. Specifically the use of a tantalum nitride (TaN) film was shown to exhibit superior alignment signal quality in both optical and e-beam alignment systems and remain stable when subjected to a high temperature ohmic alloy process step.
In accordance with one embodiment, optical lithography is used to form a metal, for example a refractory metal or refractory compound metal, such as for example, TaN, alignment mark on the zero layer (or when the MMIC mesa is formed) and then such alignment mark for optical lithography processing up to the source and drain ohmic contacts of, for example, a FET, such as a GaN FET, and then electron beam lithography is used to form the Schottky contact gate using the metal alignment mark.
The details of one or more embodiments of the disclosure are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the disclosure will be apparent from the description and drawings, and from the claims.
Like reference symbols in the various drawings indicate like elements.